A petabit.
A single switch.
The problem we built it for.
AI training fabrics are no longer plumbing. They are the binding constraint on every dollar of GPU spend.
A 100,000-accelerator cluster generates petabits of all-to-all traffic per second, with zero tolerance for loss. Today's answer is to stack electrical switches into multi-tier fat-trees — hundreds of devices, hundreds of thousands of cables, every hop converting light to electrons and back. The result is a fabric that consumes kilowatts to move bits, adds nanoseconds at every hop, and reacts to congestion only after it has already stalled the cluster.
Electrical switching has hit three walls at once: power, latency, and complexity. Adding more of it does not get past them.
The Petabit Switch is what gets past them.
What it is.
A single 1 Pb/s wafer-scale opto-electronic switch. One device that replaces the entire spine tier of a hyperscale AI fabric.
Light enters the switch as light, traverses an all-photonic switching core, and exits as light. The control plane is intelligent — it anticipates congestion rather than reacting to it. The integration is vertical — photonic switching, optical buffering, electronic control, and an embedded AI engine, co-designed as one architecture on one wafer.
The Petabit Switch is not a faster version of an existing switch. It is a structural change in how AI fabrics are built.
What makes it different.
An all-photonic switching path.
The data plane is light, end to end. There is no optical-to-electrical-to-optical conversion inside the switch — no SerDes, no high-speed ADCs, no packet ASICs in the path of the photon. This is not a cost reduction. It is a removal of the dominant power and latency tax in modern fabrics.
Heater-free electro-optic tuning.
Conventional silicon photonic switches tune their elements with resistive heaters — slow, power-hungry, thermally crosstalked. We use a different physics. Switch elements reconfigure in sub-nanosecond timescales at a fraction of the power, with no heaters and no thermal envelope to design around. This is what makes petabit density possible inside a standard rack.
A cognitive control plane.
An embedded intelligence continuously observes traffic patterns, predicts the micro-bursts that produce congestion in AI workloads, and pre-emptively reconfigures routes before any packet queues. The fabric stops being statistical and becomes deterministic. Zero packet loss. Zero GPU stall.
Wafer-scale vertical integration.
The photonic switching plane, the optical buffering layer, the electronic control logic, and the AI control engine are co-designed as a single integrated stack on a single 20cm × 20cm substrate. The architecture is the moat, and we have engineered it as one piece.
What it changes.
For an architect designing a hyperscale AI fabric, the Petabit Switch is not a faster switch. It is a different fabric.
Detailed performance characterization is shared with qualified partners under NDA.
Where it fits.
AI training super-clusters.
Drop-in spine replacement for 100K+ accelerator fabrics. No application-layer changes. The non-blocking core for all-reduce and all-gather traffic.
Sovereign AI build-outs.
Greenfield national AI facilities with no legacy fabric to protect. Fewer devices, fewer cables, lower power, smaller footprint — from day one.
AI inference at scale.
Bursty, unpredictable east-west traffic from millions of concurrent inference requests. The cognitive control plane is purpose-built for exactly this workload.
HPC and national labs.
Exascale and post-exascale interconnect where deterministic latency and zero packet loss are not preferences, but mission requirements.
The gigawatt question.
Five gigawatt-scale AI facilities are coming online in 2026. Each will house roughly half a million accelerators and demand hundreds of petabits of bisection bandwidth. The current industry answer — more electrical ASICs, more tiers, more cabling, more cooling — does not fit inside that envelope.
The Petabit Switch does.